GLOBALFOUNDRIES is excited to participate in a comprehensive schedule of activities at the 52nd Design Automation Conference (DAC) held at the Moscone Center in San Francisco, CA from June 7-11, 2015.
We will be featured in a number of technical presentations, talks, and panel discussions covering our portfolio of technology offerings, design enablement, eco-system partnerships and design and manufacturing readiness. Members of our team will present innovative power-efficient solutions for highly integrated IoT designs, automotive, analog, mobility and computing applications.
Through various presentations and talks during the event, we will highlight approaches to overcoming new design challenges as the industry moves to 14nm and beyond and will share the importance of collaborative innovation with EDA and IP partners in order to ensure faster time-to-market and correct construction by design methods. Additionally, we will provide an overview of the design infrastructure readiness for our 14nm FinFET process technology, including details on our recently announced digital design starter kit that provides designers with a built-in test case for out-of-the-box physical implementation testing and analysis of performance, power and area.
In a panel discussion on Advancing the Common Eco-System on 14LPP, GF, Samsung, and ARM executives will share their perspectives on innovative approaches to ecosystem collaboration and advancing true multi-sourcing opportunities on Monday, June 8 and Wednesday, June 10, at 3:00pm in the ChipEstimate.com Booth, #2433.
In addition, experts from GF will be available to answer questions about all aspects of design enablement and turnkey services, EDA, IP, mask operations and assembly and test solutions.
The Design Automation Conference (DAC) is recognized as the premier event for the design of electronic circuits and systems, and for electronic design automation (EDA) and silicon solutions. A diverse worldwide community of more than 1,000 organizations attends each year, represented by system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives as well as researchers and academicians from leading universities.
For more information on joint speaking opportunities with our EDA/IP eco-system partner, please visit GF at DAC 2015.